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NETX 6 - Network access controller without ARM CPU for slaves

Classification:
Product name:
NETX 6 - Network access controller without ARM CPU for slaves

Shortdescription:
Network access controller without ARM CPU for slaves

Product types:
Enabling Technology

Technology & Profiles:
PROFIBUS, PROFINET, IO-Link

Certification number:

Company:
Hilscher Gesellschaft für Systemautomation mbH
Hilscher Gesellschaft für Systemautomation mbH

Rheinstr. 15
65795 Hattersheim
Germany

Nico M�ding
Tel +49 6190 9907 0
https://www.hilscher.com
info(at)hilscher(dot)com

Illustration:
NETX 6 - Network access controller without ARM CPU for slaves
Product description:

NETX 6

  • Operates with any host processor and vendor independent protocol stack at the host site
  • Two communication channels for Real-Time Ethernet equipped with PHY or fieldbus
  • DPM or SPI host interface

The netX 6 is a highly integrated network controller of the Hilscher family with a new system architecture optimized for communication and maximum data throughput.

 

Connected via its integrated Dual-Port Memory with a bus width of up to 32-bit, the netX 6 can be used with almost any 16/32-bit CPU. From fieldbus systems to Real-Time Ethernet systems it covers the whole spectrum of industrial communication. The integrated 32-bit RISC controller executes the time-critical low-layer functions of the communication protocol and reduces the necessary bandwidth between netX 6 and host CPU. Extensive peripheral functions, serial interfaces, such as UART, USB, SPI, and I²C enable a large variety of applications.

 

The controllers of the two communication channels are identical and have a two-level structure. They consist of dedicated ALUs and special logic units that receive their protocol function via microcode. The PHYs are integrated for Ethernet, i.e. the external circuit for Ethernet is reduced to passive components such as transformers and RC components. The Medium-Access-Controller xMAC sends or receives the data according to the respective bus access process and encodes or converts the data into a byte representation.

 

The Protocol Execution Controller xPEC compiles the data into packets and controls the telegram traffic. Large data amounts are exchanged block-by-block via DMA with the ARM memory while each channel has a Dual-Port-Memory for status information. As an alternative, a triple buffer logic is implemented which always provides the address of the next free buffer to enable a conflict-free data exchange.

 

With the intelligent communication ALUs, the netX realizes the most diverse protocols and protocol combinations in one chip – an absolutely new feature in the industrial communication technology.

 

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