NETX 10 - Network controller for fieldbus slaves

Product description:

NETX 10

• ARM CPU and additional 32-bit RISC peripheral controller for parallel signal processing, as PLC core, motion or IO-Link controller
• Single chip solution requires only one serial Flash EPROM
• DPM or SPI host interface

The netX 10 has a triple core architecture with a central 32-bit/100 MHz ARM CPU, a 32-bit/100 MHz RISC controller as a communication system for all fieldbuses or as an Ethernet port, and a further 32-bit/100 MHz RISC controller for fast signal processing. It functions as a compact single chip solution in automated devices with network connection, such as I/Os, drives, sensors or ID systems. By replacing the microcode the Protocol Execution Controller xPEC is adapted to the deterministic processing of the status machine protocol and the communication functions of the respective network.

In contrast to this, the Peripheral Interface Controller xPIC can freely be programmed by the user and allows a fast signal processing parallel to the ARM-CPU, e.g. as motion or PLC core with CoDeSys or as an intelligent IO-Link controller. The xPIC can access the entire address space of the netX 10. With its second register base the xPIC achieves an interrupt latency time of only 50 nanoseconds on external signals. The command set includes all standard RISC instructions, extended by a 32x32-bit multiplication, fast loop logic and saturation support, that are all carried out in one cycle.

All processor cores are connected via a central data switch with the internal RAM, the memory controller and the two peripheral buses. The general peripheral units, such as GPIO, timer, interrupt controller, UART, USB, SPI, I2C and the AD converter, encoder, PWMs for signals and outputs are distributed on these. The memory bus can be configured as a dual-port memory for connection to a host CPU, as memory controller for SRAM and SDRAM or as simple PIOs. The SPI mode of the DPM´s enables a fast serial access to the internal memory.

The program code is loaded via the SPI interface in the internal SRAM and in SQI mode enables an \'Execution in Place\' of the program code directly from the serial Flash EPROM.

A Cordic unit is implemented for fast calculation of transcendent functions (some exponential functions, logarithms, sine and cosine).

In contrast to this, the Peripheral Interface Controller xPIC can freely be programmed by the user and allows a fast signal processing parallel to the ARM-CPU, e.g. as motion or PLC core with CoDeSys or as an intelligent IO-Link controller. The xPIC can access the entire address space of the netX 10. With its second register base the xPIC achieves an interrupt latency time of only 50 nanoseconds on external signals. The command set includes all standard RISC instructions, extended by a 32x32-bit multiplication, fast loop logic and saturation support, that are all carried out in one cycle.

The netX 10 is specified for the extended temperature range and has a 10-years delivery guarantee.

The standardized JTAG and ETM Interface (Embedded Trace Macrocell) serve to connect all ARM development tools available on the market. A complete Eclipse-based development environment with C compiler and comfortable operation of the internal debug unit with single step and break points is available via USB.

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