Product Guide
easyIRT
Classification:
Company:
Technikumstr. 9, Postfach
8401 Winterthur
Switzerland
Prof. Hans D. Doran
Tel +41 58 934 75 25
https://www.zhaw.ch/ines
info.ines(at)zhaw(dot)ch
Illustration:
Product description:
The Profinet communication controller is completely written in VHDL and supports all available FPGA devices from Xilinx, Altera and Actel. Development kits are available for the Xilinx® Zynq® 7000 All Programmable SoCs. Supporting advanced features like Dynamic Frame Packing, the IP core allows cycle times down to 31.25µs. The Profinet IRT IP core, developed by InES, can easily be combined with other IP cores to build entire System on Chip (SoC) solutions. Other features are:
- Compatible with all Profinet stacks
- Isochronous traffic can completely bypass the software stack
- 400 MHz timestamp synchronization accuracy of 60 ns over 20 nodes
- Separate buffers for LLDP and DCP frames
- IP legacy traffic as well as ART and RTA frames
- Available as: Encrypted or netlist files with precompiled ModelSim® simulation libraries
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